
45
8018P–AVR–08/10
ATmega169P
9.9
Register Description
9.9.1
SMCR – Sleep Mode Control Register
The Sleep Mode Control Register contains control bits for power management.
Bits 3, 2, 1 – SM2:0: Sleep Mode Select Bits 2, 1, and 0
These bits select between the five available sleep modes as shown in
Table 9-2.Note:
1. Standby mode is only recommended for use with external crystals or resonators.
Bit 1 – SE: Sleep Enable
The SE bit must be written to logic one to make the MCU enter the sleep mode when the SLEEP
instruction is executed. To avoid the MCU entering the sleep mode unless it is the programmer’s
purpose, it is recommended to write the Sleep Enable (SE) bit to one just before the execution of
the SLEEP instruction and to clear it immediately after waking up.
9.9.2
PRR – Power Reduction Register
Bit 7:5 - Res: Reserved bits
These bits are reserved and will always read as zero.
Bit 4 - PRLCD: Power Reduction LCD
Writing logic one to this bit shuts down the LCD controller. The LCD controller must be disabled
on how to disable the LCD controller.
Bit
765
432
10
0x33 (0x53)
–
SM2
SM1
SM0
SE
SMCR
Read/Write
R
R/W
Initial Value
0
Table 9-2.
Sleep Mode Select
SM2
SM1
SM0
Sleep Mode
00
0
Idle
0
1
ADC Noise Reduction
0
1
0
Power-down
0
1
Power-save
10
0
Reserved
10
1
Reserved
1
0
11
1
Reserved
Bit
7
6
5
4
3
2
1
0
(0x64)
–
PRLCD
PRTIM1
PRSPI
PRUSART0
PRADC
PRR
Read/Write
R
R/W
Initial Value
0